Synopsys’ Commitment to EDA Tool Interoperability Expands to Verification
April 2001
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Introduction
As system-on-chip (SoC) designs push technology to new levels of complexity, interoperability is crucial to improving design quality, lowering costs and streamlining the development cycle. Synopsys is the champion of interoperability in the EDA industry, providing programs such as in-Sync, TAP-inSM, EDASpine, S.U.R.F. and the Library Vendor Program. Making Synopsys’ widely used formats available to everyone through an Open Source model for formats and reference implementations further demonstrates Synopsys’ commitment to interoperability for the IC and systems design community.
Open Source is an increasingly popular method for creating and promoting standards in an industry. Technology in the form of formats, documentation and/or source code is made available to a community of people who have a vested interest in the success of the standard. Community members use the technology and provide enhancements back to a managing entity. The managing entity ensures “structured innovation” by adding the changes back into the standard and releasing them back to the community in a timely fashion.
Targeting the Verification Arena
As part of its ongoing efforts to bring interoperability to the most crucial aspects of SoC design, Synopsys is now making available its OpenVera hardware verification language for testbench automation through the Open Source model. OpenVera is a specially tuned verification language for use by designers and verification engineers developing testbenches for hardware validation, typically as part of a Verilog or VHDL flow. OpenVera includes a broad range of constructs that offer abstract modeling of temporal and functional constraints for a design under verification, as well as a broad set of ready-to-go building blocks for creating complex testbenches. OpenVera is designed for vertical cross-levels-of-abstraction verification testbenches and is well tuned for this, right out of the box.
OpenVera is an intuitive, easy to learn language that combines the familiarity and strengths of HDLs, C++ and Java with added constructs targeted at verification that make it ideal for developing testbenches, assertions and properties. OpenVera accelerates the creation of a verification environment by providing constructs for high levels of abstraction. It enables the creation of pseudo-random tests that can increase the test coverage space and the creation of real-time self-checking tests that can react to the state of the design and the simulation.
Synopsys is again using the Open Source model as a response to its customers’ requests for an open verification language. These customers are telling Synopsys that testbench generation and design verification are major bottlenecks in the design cycle. Their verification demands are skyrocketing. They need powerful new tools, and they want tool flows that interoperate smoothly and can work with their internal solutions. They want to be able to buy the commercial tools they need and have them interoperate from a common, standard interface instead of continuing to divert resources to integrate tools on their own. They hesitate to buy tools if they think they would be locked into a proprietary language. Time is of the essence so they can’t afford to wait for drawn-out standardization processes. Likewise, tool vendors are anxious to provide solutions and want to meet the customers’ needs for a standard interface.
But when all these companies explore available hardware verification language options, they find a number of closed, proprietary or only partially open formats. For systems houses, designers, semiconductor manufacturers and EDA vendors, the stakes are far too high to get locked into a closed, single sourced soultion. The solution can only be realized if there is a common language for testbench automation. Such a language would make it possible for EDA vendors to produce better tools and customers to employ them readily.
For all of these reasons, Synopsys has released OpenVera as an Open Source hardware verification language (HVL). The reasons are simple. OpenVera language has been in production use at leading Networking, Telecom, Processor, Computer and IP companies for the past 6 years. It has a large installed base of users that is growing rapidly and gaining popularity due to its language strengths and ease-of-learning. These customers want to see a standard hardware verification language to accelerate market growth and deliver solutions faster.
EDA vendors who support OpenVera, are aligning themselves with the growing number of their customers, system design houses and silicon manufacturers who have been waiting for a common verification language. Rather than compete on proprietary formats with questionable futures and little chance of interoperability, the EDA companies that support OpenVera will instead compete by developing their own unique tool technology. This opens the door for the systems houses and semiconductor manufacturers to develop models that comply with OpenVera with the knowledge that a wide range of EDA vendors are doing the same thing. Whoever the winners turn out to be in the tool space, anyone with OpenVera compliant models will enjoy a wide range of tool choices. In turn, the market will grow, innovation will continue and a large part of the verification headache interoperability will be relieved.
The Vera Open Source Initiative
The Vera Open Source Initiative was launched and is being managed by Synopsys to initially provide the language reference manual for OpenVera. Under the Initiative, customers and EDA developers will be able to access the language reference manual and usage examples from the new OpenVera website at http://www.open-vera.com. They can then use it to create tools, verification requirements and make enhancements. In turn, users are expected to feed their enhancements back into the community to keep the standard evolving. Actual product development and testing will further improve the quality of the language. Synopsys will play the role of managing entity, much like Linus Torvalds is the managing entity for the successful standard Linux. Synopsys has gained valuable experience with the Open Source model through its Liberty library format, SDC design constraints format and Open SystemC system-level design language. The industry has responded positively and these formats are in widespread use today.
Designers, EDA vendors, systems houses and semiconductor companies will benefit from the OpenVera standard in three primary ways. First, OpenVera will bring order to the chaos that exists today in the testbench development and verification marketplace. The emergence of a de facto standard will ensure a stable foundation for the rapid development of OpenVera-compliant IP, testbenches and tools. Second, with high quality commercial tools available from a variety of vendors, customers will have an excellent alternative to creating and supporting their own proprietary libraries and tools. OpenVera will allow these companies to take advantage of the latest innovations in this verification language and build on proven technology. Finally, EDA vendors will benefit from OpenVera because it will create a large and stable market that will be open to competitors who can concentrate on designing tools rather than accommodating a myriad of languages.
Conclusion
The design community has been clamoring for interoperability solutions so that it can focus on solving complex SoC design problems, not on procuring and developing translators, syntax checkers and other inefficient workarounds. EDA companies had historically developed and marketed tools based on their own closed, proprietary design languages. That approach limited innovation, fosters small and fragmented niche markets, lengthens time to market, imposes inefficient learning curves on designers and imposes substantial risks on customers. OpenVera changes all of that for every vendor competing in the EDA space, allowing each to innovate and create tools in a format that will soon achieve widespread acceptance. With its Vera Open Source Initiative, Synopsys is once again paving the way for tool interoperability, this time in the critical verification market. With OpenVera, companies throughout the industry can focus on developing their technology, not on guessing which proprietary standard to sponsor. These companies can realize the benefits that true interoperability standards afford. They will be free to solve SoC verification problems with languages and standards that are open, vibrant and constantly improving.